FPGA Engineer, Amazon LEO OISL
Amazon
FPGA Engineer, Amazon LEO OISL
Job Description
LEO is Amazon’s low Earth orbit satellite broadband network. Its mission is to deliver fast, reliable internet to customers and communities around the world, and we’ve designed the system with the capacity, flexibility, and performance to serve a wide range of customers, from individual households to schools, hospitals, businesses, government agencies, and other organizations operating in locations without reliable connectivity. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities Create FPGA solutions to support LEO's Optical inter satellite Link system. This is a unique opportunity to define a new system with few legacy constraints. The FPGA design engineer will work with systems teams to define/develop/implement/test/release FPGA based solutions to enable LEO. This will focus on creating digital designs using the latest generations of FPGA technologies and tools. In this role you will: Have ownership of one or more FPGA bitstreams. - Create and release FPGAs through the development phases of uArchitecture-RTL Design-Physical Implementation-Timing Closure–Simulation Validation– Lab Based Silicon Validation Collaborate with system architects to define and design/implement/test/release/support functions targeted to FPGA technology Collaborate with system architects and design engineers to implement digital logic functions in FPGAs Collaborate with system architects and design engineers to implement digital logic functions in FPGA prototypes to validate/tradeoff architecture & design alternatives Collaborate with systems architects, HW engineering design teams & FW/SW design teams to bring up and test the system solutions. Drive trade-off analysis to benefit customer experience and optimization of target technology resources for cost/size/power/performance/features
Locations
- Redmond, Washington, United States
Salary
136,000 - 184,000 USD / yearly
Skills Required
- prototypingintermediate
- writing test scriptsintermediate
- ASIC/FPGA designintermediate
- ASIC/FPGA design verification using System Verilogintermediate
- Xilinx/AMDintermediate
- uArchitectureintermediate
- SolidWorks simulationintermediate
- design of complex mechanical productsintermediate
- AXI4intermediate
Required Qualifications
- 4+ years of working in mechanical engineering or equivalent experience (experience, 4 years)
- Experience with prototyping and implementation (experience)
- Experience in writing test scripts (Python preferred) to validate FPGA images in HW (experience)
- 3+ years of experience with ASIC/FPGA design and verification tools (experience, 3 years)
- 3+ years of experience in ASIC/FPGA design verification using System Verilog, UVM (experience, 3 years)
- Experience with Xilinx/AMD (or Altera) FPGAs (experience)
- Experience with uArchitecture, RTL coding, lint checks, CDC, RDC, FPGA optimization for timing & power, simulation, and validation (experience)
Preferred Qualifications
- Knowledge of SolidWorks simulation or Ansys Finite Element analysis tools (experience)
- Experience in the design of complex mechanical products and equipment at volume (experience)
- 5+ years of full RTL development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience (experience, 5 years)
- Experience developing python tests for HW testing (experience)
- Designs, optimizes, and implement digital logic functions in control/communication and data acquisition systems (experience)
- Deep understanding of logic elements, memory blocks, DSP slices, and I/O capabilities (experience)
- Familiarity with AXI4 and AXI Streaming interfaces (experience)
- Proven track record of successfully taking FPGA/ASIC designs from development through production and deployment (experience)
- Experienced in integrating HDL simulation and hardware-in-the-loop (HIL) testing into CI/CD pipelines, ensuring automated regression testing and timing analysis validation for every code commit. (experience)
Tags & Categories
Answer 10 quick questions to check your fit for FPGA Engineer, Amazon LEO OISL @ Amazon.
10 Questions
~2 Minutes
Instant Score