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STA Engineer

Broadcom

STA Engineer

full-timePosted: Aug 2, 2026Updated: Sep 1, 2026USA-Colorado-Fort Collins-4380 Ziegler Road

Job Description

Please Note:1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)2. If you already have a Candidate Account, please Sign-In before you apply.Job Description:Broadcom’s ASIC Products Division (APD) in Fort Collins, Colorado, is looking for an experienced STA Engineer. As part of APD, you’ll help design and manufacture next-generation, high-performance, power-efficient ASICs. In this role, you will be responsible for all aspects of timing closure, including working with designers for timing changes, helping construct/modify flows, timing analysis and timing closure.Key ResponsibilitiesWorking with design teams to understand and debug constraints, facilitate logic changes to improve timingWorking with Physical Design and Logic Design teams, highlighting issuesHelp create timing ECO’s for project tapeoutWe value the ability to create and maintain scripts and methodologies for analysis and runsDocument and help with guidelines and specsDeep analysis of timing paths to identify key issues is criticalImplement timing infrastructureGood communicator who can accurately describe issues and follow them through to completion. Your attention to detail will be instrumental to success.Requirements 5-10 years of hands on experience in STAFamiliar with timing of large high-performance SoC designs in sub-micron technologiesUnderstand timing margin fundamentals from synthesis to sign offBe proficient in STA and standards for timing closure, and have a deep understanding of noise, cross-talk, and OCV effects, among othersHave familiarity with circuit modeling, including SPICE models and worst-case corner selectionHave strong programming skills with Perl, TCLProficient in timing flows using industry standard toolsExperience with STA on large, complex designs and Multi-Scenario Timing Closure is highly beneficial, and familiarity with ECO techniques and implementation.Education & ExperienceMSEE or equivalent is required10+ years relevant industry experienceCompensation and BenefitsThe annual base salary range for this position is USD 129,400.00 To USD 207,000.00As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Locations

  • USA-Colorado-Fort Collins-4380 Ziegler Road

Skills Required

  • STAintermediate
  • circuit modelingintermediate
  • timing flows using industry standard toolsintermediate
  • STA on largeintermediate
  • ECO techniquesintermediate

Required Qualifications

  • 5-10 years of hands on experience in STA (experience, 10 years)
  • Familiar with timing of large high-performance SoC designs in sub-micron technologies (experience)
  • Understand timing margin fundamentals from synthesis to sign off (experience)
  • Be proficient in STA and standards for timing closure, and have a deep understanding of noise, cross-talk, and OCV effects, among others (experience)
  • Have familiarity with circuit modeling, including SPICE models and worst-case corner selection (experience)
  • Have strong programming skills with Perl, TCL (experience)
  • Proficient in timing flows using industry standard tools (experience)
  • Experience with STA on large, complex designs and Multi-Scenario Timing Closure is highly beneficial, and familiarity with ECO techniques and implementation. (experience)
  • 5-10 years of hands on experience in STA (experience, 10 years)
  • Familiar with timing of large high-performance SoC designs in sub-micron technologies (experience)
  • Understand timing margin fundamentals from synthesis to sign off (experience)
  • Be proficient in STA and standards for timing closure, and have a deep understanding of noise, cross-talk, and OCV effects, among others (experience)
  • Have familiarity with circuit modeling, including SPICE models and worst-case corner selection (experience)
  • Have strong programming skills with Perl, TCL (experience)
  • Proficient in timing flows using industry standard tools (experience)
  • Experience with STA on large, complex designs and Multi-Scenario Timing Closure is highly beneficial, and familiarity with ECO techniques and implementation. (experience)
  • 10+ years relevant industry experience (experience, 10 years)

Responsibilities

  • Working with design teams to understand and debug constraints, facilitate logic changes to improve timing
  • Working with Physical Design and Logic Design teams, highlighting issues
  • Help create timing ECO’s for project tapeout
  • We value the ability to create and maintain scripts and methodologies for analysis and runs
  • Document and help with guidelines and specs
  • Deep analysis of timing paths to identify key issues is critical
  • Implement timing infrastructure
  • Good communicator who can accurately describe issues and follow them through to completion. Your attention to detail will be instrumental to success.
  • Working with design teams to understand and debug constraints, facilitate logic changes to improve timing
  • Working with Physical Design and Logic Design teams, highlighting issues
  • Help create timing ECO’s for project tapeout
  • We value the ability to create and maintain scripts and methodologies for analysis and runs
  • Document and help with guidelines and specs
  • Deep analysis of timing paths to identify key issues is critical
  • Implement timing infrastructure
  • Good communicator who can accurately describe issues and follow them through to completion. Your attention to detail will be instrumental to success.

Benefits

  • general: As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
  • general: Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
  • general: Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
  • general: If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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