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DRAM Device Engineer Lead

Micron Technology

DRAM Device Engineer Lead

full-timePosted: Aug 2, 2026Updated: Sep 1, 2026Taiwan, Taichung - Fab 16

Job Description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.Our vision is to transform how the world uses information to enrich life for all.Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence. As a Lead DRAM Device Engineer, you will provide technical leadership in enabling next‑generation DRAM technologies in high‑volume manufacturing, driving yield ramp, device performance, and product quality across the fab.In this role, you will own critical device deliverables, influence technology and product decisions, and act as a technical focal point across Process Integration, Design, Product Engineering, QA, and Failure Analysis teams. You will guide complex data analysis, define strategy for device characterization and reliability, and mentor junior engineers.Key ResponsibilitiesLead and coordinate remote device engineering team in Taiwan to support ID1 activities, serving as the primary technical point of contact between Boise‑based device team and Taiwan based device team.Provide technical leadership across time zones, ensuring rapid issue triage, clear ownership, and effective handoff between local and remote teams.Drive alignment on device performance, yield, and reliability priorities across ID1 teams in Boise and Taiwan, ensuring consistent execution and decision‑making.Lead remote reviews of electrical data, characterization results, and inline metrics, providing clear technical direction and action plans to process integration team, process team, and product engineering team et al.Establish and maintain standardized communication and reporting mechanisms (e.g., dashboards, review cadence, escalation paths) to support efficient remote collaboration.Support fab ramp, yield excursions, and high‑priority production issues by coordinating root‑cause analysis and corrective actions with cross‑functional partners.Mentor and technically guide remote engineers, sharing best practices in device analysis, DOE strategy, and problem‑solving methodology.Communicate status, risks, and recommendations effectively to ID1 leadership and global stakeholders, influencing priorities and resource allocation.Required QualificationsExperience supporting high‑volume manufacturing and production yield ramp or technology transfer.Strong and in‑depth knowledge of semiconductor device physics.Extensive experience in semiconductor device segmentation and electrical data analysis.Solid understanding of CMOS and circuit operation; knowledge of memory product architecture is highly desirable.Proficiency with statistical data analysis and data‑driven problem solving.Programming experience (e.g., Python, C++, or similar) and familiarity with data automation tools is a strong plus.Strong communication skills with the ability to lead technical discussions and influence cross‑functional teams.Self‑motivated, proactive, and capable of owning ambiguous, high‑impact problems.Preferred ExperienceHands‑on experience with DRAM or other memory technologies (DRAM, NAND, NOR).Demonstrated technical leadership or mentorship experience.EducationM.S or Ph.D in Electrical Engineering, Materials Engineering, or a related field.About Micron Technology, Inc.We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.To learn more, please visit micron.com/careersAll qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.To request assistance with the application process and/or for reasonable accommodations, please contact at hrsupport_taiwan@micron.com. Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

Locations

  • Taiwan, Taichung - Fab 16

Skills Required

  • semiconductor device physicsintermediate
  • semiconductor device segmentationintermediate
  • memory product architecture is highly desirableintermediate
  • statistical data analysisintermediate
  • data automation tools is a strong plusintermediate
  • DRAMintermediate

Required Qualifications

  • Experience supporting high‑volume manufacturing and production yield ramp or technology transfer. (experience)
  • Strong and in‑depth knowledge of semiconductor device physics. (experience)
  • Extensive experience in semiconductor device segmentation and electrical data analysis. (experience)
  • Solid understanding of CMOS and circuit operation; knowledge of memory product architecture is highly desirable. (experience)
  • Proficiency with statistical data analysis and data‑driven problem solving. (experience)
  • Programming experience (e.g., Python, C++, or similar) and familiarity with data automation tools is a strong plus. (experience)
  • Strong communication skills with the ability to lead technical discussions and influence cross‑functional teams. (experience)
  • Self‑motivated, proactive, and capable of owning ambiguous, high‑impact problems. (experience)

Preferred Qualifications

  • Hands‑on experience with DRAM or other memory technologies (DRAM, NAND, NOR). (experience)
  • Demonstrated technical leadership or mentorship experience. (experience)

Responsibilities

  • Lead and coordinate remote device engineering team in Taiwan to support ID1 activities, serving as the primary technical point of contact between Boise‑based device team and Taiwan based device team.
  • Provide technical leadership across time zones, ensuring rapid issue triage, clear ownership, and effective handoff between local and remote teams.
  • Drive alignment on device performance, yield, and reliability priorities across ID1 teams in Boise and Taiwan, ensuring consistent execution and decision‑making.
  • Lead remote reviews of electrical data, characterization results, and inline metrics, providing clear technical direction and action plans to process integration team, process team, and product engineering team et al.
  • Establish and maintain standardized communication and reporting mechanisms (e.g., dashboards, review cadence, escalation paths) to support efficient remote collaboration.
  • Support fab ramp, yield excursions, and high‑priority production issues by coordinating root‑cause analysis and corrective actions with cross‑functional partners.
  • Mentor and technically guide remote engineers, sharing best practices in device analysis, DOE strategy, and problem‑solving methodology.
  • Communicate status, risks, and recommendations effectively to ID1 leadership and global stakeholders, influencing priorities and resource allocation.

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