Design Verification Engineer- Senior / Principal
Microsoft
Design Verification Engineer- Senior / Principal
Job Description
OverviewMicrosoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft’s Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for design verification engineer to work in the dynamic Microsoft Artificial Intelligence Silicon Engineering (AISiE) team. The candidate should be a highly motivated self-starter who will thrive in this cutting-edge technical environment. Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.ResponsibilitiesThe AISiE silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner. Own or lead verification of complex flows at the SOC, subsystem, or IP levels Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios. Learn about the design and interact with partner teams to define verification strategies and test plans Develop verification environments and run and debug simulations to drive quality Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals innovate to improve verification efficiency through methodologies or tools Coach and mentor others in your areas of expertise Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion Qualifications8-16 years of experience in design verification with a proven track record of delivering complex CPU or SoC IP’s Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff in UVM or C++ Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments Scripting language such as Python or Perl This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.
Locations
- IN
Skills Required
- debugging RTLintermediate
Required Qualifications
- 8-16 years of experience in design verification with a proven track record of delivering complex CPU or SoC IP’s (experience, 16 years)
- 8-16 years of experience in design verification with a proven track record of delivering complex CPU or SoC IP’s (experience, 16 years)
- Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff in UVM or C++ (experience)
- Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff in UVM or C++ (experience)
- Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments (experience)
- Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments (experience)
- Scripting language such as Python or Perl (experience)
- Scripting language such as Python or Perl (experience)
- This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled. (experience)
Responsibilities
- The AISiE silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner.
- Own or lead verification of complex flows at the SOC, subsystem, or IP levels
- Own or lead verification of complex flows at the SOC, subsystem, or IP levels
- Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios.
- Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios.
- Learn about the design and interact with partner teams to define verification strategies and test plans
- Learn about the design and interact with partner teams to define verification strategies and test plans
- Develop verification environments and run and debug simulations to drive quality
- Develop verification environments and run and debug simulations to drive quality
- Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
- Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
- innovate to improve verification efficiency through methodologies or tools
- innovate to improve verification efficiency through methodologies or tools
- Coach and mentor others in your areas of expertise
- Coach and mentor others in your areas of expertise
- Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
- Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
Benefits
- general: Flexibility: Balance what matters—your work, your life, and your team—through trust, autonomy, and shared accountability
- general: Growth: Stretch your skills, expand your impact, and grow with support that meets you where you are
- general: Wellbeing: Support for your body, mind, and financial future—so you can stay energized and do your best work
- general: Community PCS: Find your people, build your network, and feel supported every step of the way
Travel Requirements
Less than 25%
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