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Principal Firmware Engineer

Microsoft

Principal Firmware Engineer

full-timePosted: Jul 17, 2026Updated: Aug 27, 2026Noida, UP, IN

Job Description

OverviewMicrosoft Silicon and Cloud Hardware Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding cloud infrastructure, powering the company's Intelligent Cloud and AI platforms through industry-leading silicon, systems, and hardware innovation. Are you passionate about building cutting-edge technologies in an environment that embraces a growth mindset? Do you want to help shape the future of AI infrastructure while contributing to Microsoft's mission to empower every person and every organization on the planet to achieve more? The Firmware Center of Excellence (FW CoE) within SCHIE is responsible for delivering the hardware and firmware technologies that power Azure infrastructure. As part of this organization, we are seeking a Principal Firmware Engineer to lead the design and evolution of Microsoft's AI accelerator validation and performance characterization frameworks, supporting the MAIA roadmap and future generations of Azure AI silicon. In this role, you will drive the architecture and development of scalable stress, validation and performance characterization solutions used across Microsoft's AI accelerator programs. You will work at the intersection of system architecture, firmware, software, performance engineering, AI workloads, and silicon validation to enable high-confidence silicon bring-up, characterization, and deployment at hyperscale. You will partner closely with teams spanning these disciplines to develop and operationalize validation frameworks and workload solutions that exercise compute, memory, networking, and platform infrastructure under both synthetic stress conditions and representative customer AI workloads. Your work will directly influence silicon readiness, platform quality, performance optimization, and production deployment of Microsoft's next-generation AI infrastructure. We are looking for a technically strong leader who combines deep systems expertise with a passion for solving complex engineering problems, driving cross-organizational impact, and mentoring teams to deliver world-class solutions at cloud scale. You will be working on latest state-of-the art technologies, in a fun environment with a talented group of individuals with diverse backgrounds and skillsets and located in different geographic locations. #SCHIE ResponsibilitiesDefine and drive the technical vision, architecture, and roadmap for scalable system stress and performance characterization frameworks across current and future AI accelerator generations. Design and development of highly-performant validation and stress workloads spanning GPU Compute engines, memory, networking, PCIe, and DMA subsystems. Architect and develop end-to-end validation strategies from pre-silicon environments through post-silicon bring-up, characterization, and production deployment with a goal to identify hardware, firmware, and system-level reliability issues as early as possible Develop end-to-end post-silicon tests and tools for functional and performance scenarios of the system. Develop performance analysis, telemetry, and observability solutions to measure compute utilization, memory bandwidth, network throughput, power, thermal behavior and end-to-end workload performance. Drive adoption of profiling, performance monitoring, and other platform observability technologies to accelerate debugging, tuning, and characterization. Partner closely with Architecture, AI software, Firmware, Silicon Validation, Manufacturing, Performance Engineering, and Cloud Infrastructure teams to influence platform requirements and readiness. Provide technical leadership through design reviews, architecture guidance, and strategic recommendations to engineering leadership. Mentor engineers across workload development, performance optimization, debugging, automation, and validation, while establishing best practices for software quality, CI/CD, telemetry, and large-scale system validation. Drive execution across multiple programs, balancing deep technical contribution with broad organizational impact. QualificationsRequired Qualifications BS. or higher in Computer Science, Computer Engineering, Electrical Engineering, or related. 12+ years of experience developing complex software, firmware, system software, or validation frameworks. 8+ years’ experience in post-silicon SoC or system validation or diagnostic/microbenchmark/stress test content development. Experience with one or more of these: Accelerators or GPUs, DMA Engines, PCIe, Memory (DDR, HBM), Networking Proven experience in one or more areas: Silicon validation, Firmware development, Platform diagnostics, Performance engineering, Stress and reliability testing Experience debugging issues across hardware, firmware, drivers, SDKs, and applications. Strong leadership and cross-team collaboration skills Preferred Qualifications Experience in Post-silicon tests or tools development for functional and performance scenarios. Knowledge of or experience with AI models/kernels such as GEMM, GPT, Gemma, MoE, Llama, or similar Experience with PyTorch, CUDA, Triton, or accelerator runtime frameworks. Good understanding of AI accelerators, such as GPUs, NPUs, FPGAs, with an understanding of their architectures including Data pipelines, Data formats, Memory hierarchies including HBM/LPDDR, Tensor core architecture etc. Experience with Cuda or GPU or tensor-based programming is a plus+ Experience with pre-silicon environments such as emulation or simulation platforms. Experience developing profiling, and performance analysis tools. Experience in performance engineering, bottleneck identification and performance optimization. Knowledge of power and thermal profiling, TDP/PnP, and PVT characterization. Experience in build systems such as CMake and familiarity with CI/CD systems. Ability to work closely with diverse customers and collaborators across varied disciplines (silicon architecture, FW, SW dev, validation engineers) to reconcile requirements from understanding their needs to resolving their problems. Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

Locations

  • Noida, UP, IN
  • Hyderabad, TS, IN
  • Bengaluru, KA, IN

Skills Required

  • post-silicon SoCintermediate
  • oneintermediate
  • Post-silicon testsintermediate
  • AI models/kernels such as GEMMintermediate
  • or experience with AI models/kernels such as GEMMintermediate
  • PyTorchintermediate
  • Cudaintermediate
  • pre-silicon environments such as emulationintermediate
  • performance engineeringintermediate
  • powerintermediate
  • build systems such as CMakeintermediate
  • CI/CD systemsintermediate

Required Qualifications

  • BS. or higher in Computer Science, Computer Engineering, Electrical Engineering, or related. (experience)
  • BS. or higher in Computer Science, Computer Engineering, Electrical Engineering, or related. (experience)
  • 12+ years of experience developing complex software, firmware, system software, or validation frameworks. (experience, 12 years)
  • 12+ years of experience developing complex software, firmware, system software, or validation frameworks. (experience, 12 years)
  • 8+ years’ experience in post-silicon SoC or system validation or diagnostic/microbenchmark/stress test content development. (experience, 8 years)
  • 8+ years’ experience in post-silicon SoC or system validation or diagnostic/microbenchmark/stress test content development. (experience, 8 years)
  • Experience with one or more of these: Accelerators or GPUs, DMA Engines, PCIe, Memory (DDR, HBM), Networking (experience)
  • Experience with one or more of these: Accelerators or GPUs, DMA Engines, PCIe, Memory (DDR, HBM), Networking (experience)
  • Proven experience in one or more areas: Silicon validation, Firmware development, Platform diagnostics, Performance engineering, Stress and reliability testing (experience)
  • Proven experience in one or more areas: Silicon validation, Firmware development, Platform diagnostics, Performance engineering, Stress and reliability testing (experience)
  • Experience debugging issues across hardware, firmware, drivers, SDKs, and applications. (experience)
  • Experience debugging issues across hardware, firmware, drivers, SDKs, and applications. (experience)
  • Strong leadership and cross-team collaboration skills (experience)
  • Strong leadership and cross-team collaboration skills (experience)

Preferred Qualifications

  • Experience in Post-silicon tests or tools development for functional and performance scenarios. (experience)
  • Experience in Post-silicon tests or tools development for functional and performance scenarios. (experience)
  • Knowledge of or experience with AI models/kernels such as GEMM, GPT, Gemma, MoE, Llama, or similar (experience)
  • Knowledge of or experience with AI models/kernels such as GEMM, GPT, Gemma, MoE, Llama, or similar (experience)
  • Experience with PyTorch, CUDA, Triton, or accelerator runtime frameworks. (experience)
  • Experience with PyTorch, CUDA, Triton, or accelerator runtime frameworks. (experience)
  • Good understanding of AI accelerators, such as GPUs, NPUs, FPGAs, with an understanding of their architectures including Data pipelines, Data formats, Memory hierarchies including HBM/LPDDR, Tensor core architecture etc. (experience)
  • Good understanding of AI accelerators, such as GPUs, NPUs, FPGAs, with an understanding of their architectures including Data pipelines, Data formats, Memory hierarchies including HBM/LPDDR, Tensor core architecture etc. (experience)
  • Experience with Cuda or GPU or tensor-based programming is a plus+ (experience)
  • Experience with Cuda or GPU or tensor-based programming is a plus+ (experience)
  • Experience with pre-silicon environments such as emulation or simulation platforms. (experience)
  • Experience with pre-silicon environments such as emulation or simulation platforms. (experience)
  • Experience developing profiling, and performance analysis tools. (experience)
  • Experience developing profiling, and performance analysis tools. (experience)
  • Experience in performance engineering, bottleneck identification and performance optimization. (experience)
  • Experience in performance engineering, bottleneck identification and performance optimization. (experience)
  • Knowledge of power and thermal profiling, TDP/PnP, and PVT characterization. (experience)
  • Knowledge of power and thermal profiling, TDP/PnP, and PVT characterization. (experience)
  • Experience in build systems such as CMake and familiarity with CI/CD systems. (experience)
  • Experience in build systems such as CMake and familiarity with CI/CD systems. (experience)
  • Ability to work closely with diverse customers and collaborators across varied disciplines (silicon architecture, FW, SW dev, validation engineers) to reconcile requirements from understanding their needs to resolving their problems. (experience)
  • Ability to work closely with diverse customers and collaborators across varied disciplines (silicon architecture, FW, SW dev, validation engineers) to reconcile requirements from understanding their needs to resolving their problems. (experience)
  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. (experience)
  • This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled. (experience)

Responsibilities

  • Define and drive the technical vision, architecture, and roadmap for scalable system stress and performance characterization frameworks across current and future AI accelerator generations.
  • Define and drive the technical vision, architecture, and roadmap for scalable system stress and performance characterization frameworks across current and future AI accelerator generations.
  • Design and development of highly-performant validation and stress workloads spanning GPU Compute engines, memory, networking, PCIe, and DMA subsystems.
  • Design and development of highly-performant validation and stress workloads spanning GPU Compute engines, memory, networking, PCIe, and DMA subsystems.
  • Architect and develop end-to-end validation strategies from pre-silicon environments through post-silicon bring-up, characterization, and production deployment with a goal to identify hardware, firmware, and system-level reliability issues as early as possible
  • Architect and develop end-to-end validation strategies from pre-silicon environments through post-silicon bring-up, characterization, and production deployment with a goal to identify hardware, firmware, and system-level reliability issues as early as possible
  • Develop end-to-end post-silicon tests and tools for functional and performance scenarios of the system.
  • Develop end-to-end post-silicon tests and tools for functional and performance scenarios of the system.
  • Develop performance analysis, telemetry, and observability solutions to measure compute utilization, memory bandwidth, network throughput, power, thermal behavior and end-to-end workload performance.
  • Develop performance analysis, telemetry, and observability solutions to measure compute utilization, memory bandwidth, network throughput, power, thermal behavior and end-to-end workload performance.
  • Drive adoption of profiling, performance monitoring, and other platform observability technologies to accelerate debugging, tuning, and characterization.
  • Drive adoption of profiling, performance monitoring, and other platform observability technologies to accelerate debugging, tuning, and characterization.
  • Partner closely with Architecture, AI software, Firmware, Silicon Validation, Manufacturing, Performance Engineering, and Cloud Infrastructure teams to influence platform requirements and readiness.
  • Partner closely with Architecture, AI software, Firmware, Silicon Validation, Manufacturing, Performance Engineering, and Cloud Infrastructure teams to influence platform requirements and readiness.
  • Provide technical leadership through design reviews, architecture guidance, and strategic recommendations to engineering leadership.
  • Provide technical leadership through design reviews, architecture guidance, and strategic recommendations to engineering leadership.
  • Mentor engineers across workload development, performance optimization, debugging, automation, and validation, while establishing best practices for software quality, CI/CD, telemetry, and large-scale system validation.
  • Mentor engineers across workload development, performance optimization, debugging, automation, and validation, while establishing best practices for software quality, CI/CD, telemetry, and large-scale system validation.
  • Drive execution across multiple programs, balancing deep technical contribution with broad organizational impact.
  • Drive execution across multiple programs, balancing deep technical contribution with broad organizational impact.

Benefits

  • general: Flexibility: Balance what matters—your work, your life, and your team—through trust, autonomy, and shared accountability
  • general: Growth: Stretch your skills, expand your impact, and grow with support that meets you where you are
  • general: Wellbeing: Support for your body, mind, and financial future—so you can stay energized and do your best work
  • general: Community PCS: Find your people, build your network, and feel supported every step of the way

Travel Requirements

Less than 25%

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