MNC InsiderMNC Insider
Microsoft logo

Senior Formal Verification Engineer

Microsoft

Senior Formal Verification Engineer

full-timePosted: Aug 17, 2026Updated: Aug 27, 2026Bengaluru, KA, IN

Job Description

OverviewWe are seeking an experienced Formal Verification Engineer with 7+ years of expertise in SoC/IP verification using formal methods. The ideal candidate will drive formal verification strategy, develop scalable verification environments, create assertions and properties, perform architectural and RTL verification, and collaborate closely with architects, designers, and DV teams to ensure high-quality silicon delivery.ResponsibilitiesDefine and execute formal verification strategies for complex IPs, subsystems, and SoCs.Develop formal verification plans based on architecture and microarchitecture specifications.Create SystemVerilog Assertions (SVA), formal properties, assumptions, covers, and checkers.Debug counterexamples and work closely with designers to root-cause and resolve design issues.Drive verification closure through proof convergence, coverage analysis, and methodology improvements.Develop reusable formal verification components, libraries, and automation flows.Contribute to formal verification methodology evolution, AI-assisted verification workflows, and best practices.Mentor early career engineers and review verification plans, properties, and results.Collaborate with cross-functional teams including Architecture, RTL Design, DV, Emulation, and Silicon Validation.QualificationsRequired QualificationsBachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.7+ years of experience in semiconductor verification with significant focus on Formal Verification.Strong understanding of:Digital Design FundamentalsComputer Architecture and SoC DesignExpertise in SystemVerilog and SystemVerilog Assertions (SVA).Hands-on experience with formal verification tools such as:Cadence JasperGoldSynopsys VC FormalStrong debugging and analytical skills. This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

Locations

  • Bengaluru, KA, IN

Skills Required

  • SystemVerilogintermediate
  • formal verification tools such asintermediate

Required Qualifications

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. (degree in master)
  • 7+ years of experience in semiconductor verification with significant focus on Formal Verification. (experience, 7 years)
  • Strong understanding of: (experience)
  • Expertise in SystemVerilog and SystemVerilog Assertions (SVA). (experience)
  • Hands-on experience with formal verification tools such as: (experience)
  • Strong debugging and analytical skills. (experience)
  • This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled. (experience)

Responsibilities

  • Define and execute formal verification strategies for complex IPs, subsystems, and SoCs.
  • Develop formal verification plans based on architecture and microarchitecture specifications.
  • Create SystemVerilog Assertions (SVA), formal properties, assumptions, covers, and checkers.
  • Debug counterexamples and work closely with designers to root-cause and resolve design issues.
  • Drive verification closure through proof convergence, coverage analysis, and methodology improvements.
  • Develop reusable formal verification components, libraries, and automation flows.
  • Contribute to formal verification methodology evolution, AI-assisted verification workflows, and best practices.
  • Mentor early career engineers and review verification plans, properties, and results.
  • Collaborate with cross-functional teams including Architecture, RTL Design, DV, Emulation, and Silicon Validation.

Benefits

  • general: Flexibility: Balance what matters—your work, your life, and your team—through trust, autonomy, and shared accountability
  • general: Growth: Stretch your skills, expand your impact, and grow with support that meets you where you are
  • general: Wellbeing: Support for your body, mind, and financial future—so you can stay energized and do your best work
  • general: Community PCS: Find your people, build your network, and feel supported every step of the way

Travel Requirements

Less than 25%

Target Your Resume for "Senior Formal Verification Engineer" , Microsoft

Get personalized recommendations to optimize your resume specifically for Senior Formal Verification Engineer. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Senior Formal Verification Engineer" , Microsoft

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

Silicon EngineeringHardware EngineeringSilicon EngineeringHardware Engineering

Answer 10 quick questions to check your fit for Senior Formal Verification Engineer @ Microsoft.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.