We are seeking a talented Signal Integrity Design Engineer to join our team at Nokia. In this role, you will play a crucial part in simulating and optimizing high-speed PCB channels, ensuring signal integrity for our advanced telecommunications systems. Your expertise will be instrumental in guiding digital hardware designers and contributing to the design of PCB test boards. Simulate ultra high-speed PCB channels (112G+ SerDes rates) with connectors, breakouts, and via structures. Provide signal integrity guidance to Digital Hardware Designers, utilizing both simulated and empirical results. Assist in the design of PCB test boards to validate and corroborate simulations. Collaborate with cross-functional teams to ensure signal integrity requirements are met. Stay updated with industry trends and advancements in signal integrity engineering. Document and present simulation results and recommendations to stakeholders. Support the development and improvement of signal integrity design processes. Participate in design reviews and provide constructive feedback. Minimum B.Sc. or B.Eng. in Electrical Engineering or Computer Engineering.5+ years of experience simulating high-speed SerDes in PCB applications.Expertise in using Ansys HFSS or Dassault CST simulation tools is a must.Hands-on experience with TDR/VNA equipment and oscilloscopes for measurements.Excellent interpersonal and communication skills for effective collaboration.Familiarity with Mentor Hyperlynx, HSpice, and Cadence Allegro is preferred.Knowledge of PAM4 transmitter and receiver technologies, including FIR, CTLE, DFE, and FEC.Understanding of EMC/EMI theoretical aspects and ITU/IEEE/Bellcore standards.Programming/Scripting skills in C, Python, or Matlab are beneficial.A strong passion for signal integrity engineering and a commitment to continuous learning.