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Chip Design Engineer

NVIDIA

Chip Design Engineer

full-timePosted: Aug 12, 2026Updated: Aug 27, 2026Yokneam, Israel

Job Description

NVIDIA is looking for best-in-class Chip Verification Engineers to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.What you’ll be doing:Verification for chip blocks/entities according to specificationsIntegrations and Full-Chip modelsInteraction with organization-wide groupsWhat we need to see:B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering or equivalent experience with 0+ years of experienceHigh Level of EnglishAbility to work as part of a teamWays to stand out from the crowd:Validated experience in VerificationBackground in SpecmanBackground in UVM/SVKnowledge in HDL (Verilog/VHDL)NVIDIA has some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Locations

  • Yokneam, Israel
  • Tel Aviv, Israel

Responsibilities

  • Verification for chip blocks/entities according to specifications
  • Integrations and Full-Chip models
  • Interaction with organization-wide groups
  • Verification for chip blocks/entities according to specifications
  • Integrations and Full-Chip models
  • Interaction with organization-wide groups

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