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Senior FC Verification & Simulation Infrastructure Engineer

NVIDIA

Senior FC Verification & Simulation Infrastructure Engineer

full-timePosted: Aug 5, 2026Updated: Aug 27, 2026Yokneam, Israel

Job Description

We are looking for a best-in-class Senior Full-Chip Verification Engineer with a strong infrastructure mindset to join NVIDIA's Networking Silicon team. In this role, you will be responsible for the development and verification of our next-generation NICs at the system level, while also driving the evolution of the simulation infrastructure powering our verification flows. You will contribute to the architecture of high-speed communication devices by driving full-chip verification execution for the networking solutions powering the world's most advanced data centers, in a meaningful, growing environment where you make a huge impact in a technology-focused company.What you'll be doing:Simulation Infrastructure & Acceleration: Identify bottlenecks in the verification flow and engineer creative solutions - building frameworks, optimizing regressions, and accelerating simulation throughput through innovative toolingMulti-Language Development: Work across a diverse technology stack (SystemVerilog/UVM, Specman, Python, C/C++, scripting) - writing code and solving problems at every layer, from RTL testbenches to infrastructure utilities and automation.System-Level Debug & Analysis: Gain a strong understanding of chip micro-architecture and features, investigate, debug, and resolve cross-block issues to guarantee feature correctness and complianceAI-Enhanced Development: Accelerate development by leveraging cutting-edge AI coding tools and frameworks - applied to both verification and infrastructure challenges.Cross-Team Collaboration: Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware and all units inside the NICWhat we need to see:Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience8+ years of experience in verification, HW simulation, or infrastructure development for silicon projectsInfrastructure mindset - a proven ability to enhance and scale the systems that drive verification: regression frameworks, simulation performance, tooling, and flow automationCreativity and proactivity - an innovation mindset with a proactive approach to adopting new methodologies and coding tools to solve complex challengesStrong debugging, problem-solving, and analytical skillsA team player with good communication and interpersonal skillsWays to stand out:Experience leveraging AI tools for verification automation or infrastructure acceleration.Experience working in multi-language environments

Locations

  • Yokneam, Israel

Responsibilities

  • Simulation Infrastructure & Acceleration: Identify bottlenecks in the verification flow and engineer creative solutions - building frameworks, optimizing regressions, and accelerating simulation throughput through innovative tooling
  • Multi-Language Development: Work across a diverse technology stack (SystemVerilog/UVM, Specman, Python, C/C++, scripting) - writing code and solving problems at every layer, from RTL testbenches to infrastructure utilities and automation.
  • System-Level Debug & Analysis: Gain a strong understanding of chip micro-architecture and features, investigate, debug, and resolve cross-block issues to guarantee feature correctness and compliance
  • AI-Enhanced Development: Accelerate development by leveraging cutting-edge AI coding tools and frameworks - applied to both verification and infrastructure challenges.
  • Cross-Team Collaboration: Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware and all units inside the NIC
  • Simulation Infrastructure & Acceleration: Identify bottlenecks in the verification flow and engineer creative solutions - building frameworks, optimizing regressions, and accelerating simulation throughput through innovative tooling
  • Multi-Language Development: Work across a diverse technology stack (SystemVerilog/UVM, Specman, Python, C/C++, scripting) - writing code and solving problems at every layer, from RTL testbenches to infrastructure utilities and automation.
  • System-Level Debug & Analysis: Gain a strong understanding of chip micro-architecture and features, investigate, debug, and resolve cross-block issues to guarantee feature correctness and compliance
  • AI-Enhanced Development: Accelerate development by leveraging cutting-edge AI coding tools and frameworks - applied to both verification and infrastructure challenges.
  • Cross-Team Collaboration: Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware and all units inside the NIC

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