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Senior SoC Architect

NVIDIA

Senior SoC Architect

full-timePosted: Jul 28, 2026Updated: Aug 27, 2026Yokneam, Israel

Job Description

NVIDIA networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. We make outstanding artificial intelligence happen and accelerate Open-AI’s Chat-GPT, for example. We believe in our people and products and seek excellent people to join us!We're looking for a hardware architect for our NIC and DPU division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of NVIDIA’s next generation NIC and DPU products. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.What you'll be doing:Learn and understand the NIC u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.Define the next generation NVIDIA systems. Work closely with GPU and CPU teams for building the cut-edge systems.Define the implementation of the most sophisticated features of our next products, balancing architecture requirements with backend, execution, and design considerations.Understand our system requirements and help define the POR of our NIC and DPU product line.Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units’ designers as they require full cross-unit understanding of the chip.Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.Thoroughly understand SoC flows, PCIe, Ethernet, InfiniBand and NvLink protocols.What we need to see:B.Sc./M.Sc in Electrical Engineering from a known universityExcellent grades5+ years of experience in ASIC design/uarch/arch/performanceAt least 4 years of hands on experience in writing Verilog/VHDL or Strong analytic capabilities, and passion for solving logical issuesStrong debug skillsAbility to drive complex activities involving many interfaces and teamsGood communications skillNVIDIA is committed to fostering a diverse work environment and proud to be equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Locations

  • Yokneam, Israel
  • Tel Aviv, Israel

Responsibilities

  • Learn and understand the NIC u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.
  • Define the next generation NVIDIA systems. Work closely with GPU and CPU teams for building the cut-edge systems.
  • Define the implementation of the most sophisticated features of our next products, balancing architecture requirements with backend, execution, and design considerations.
  • Understand our system requirements and help define the POR of our NIC and DPU product line.
  • Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units’ designers as they require full cross-unit understanding of the chip.
  • Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
  • Thoroughly understand SoC flows, PCIe, Ethernet, InfiniBand and NvLink protocols.
  • Learn and understand the NIC u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.
  • Define the next generation NVIDIA systems. Work closely with GPU and CPU teams for building the cut-edge systems.
  • Define the implementation of the most sophisticated features of our next products, balancing architecture requirements with backend, execution, and design considerations.
  • Understand our system requirements and help define the POR of our NIC and DPU product line.
  • Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units’ designers as they require full cross-unit understanding of the chip.
  • Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
  • Thoroughly understand SoC flows, PCIe, Ethernet, InfiniBand and NvLink protocols.

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