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Verification Engineer - HWPM

NVIDIA

Verification Engineer - HWPM

full-timePosted: Aug 8, 2026Updated: Aug 27, 2026Bengaluru, India

Job Description

NVIDIA has been redefining computer graphics, PC Gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s motivated by phenomenal technology – and outstanding people. Today, we are tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work.The HWPM Team at NVIDIA is seeking an excellent ASIC Verification Engineer to drive high-quality, robust verification of system-level IP across unit, subsystem, and SoC levels. This role is ideal for someone passionate about ground-breaking hardware, sophisticated verification methodologies, and crafting the future of computing. Come join the team and see how you can make a lasting impact on the world.What You’ll Be Doing:Play a key role in the Hardware Performance Monitor (HWPM) team, helping define and develop system-level RTL and performance measurement methodologies for NVIDIA’s industry-leading SoCs and GPUs.Develop comprehensive test plans, implement tests, and apply robust verification strategies to validate microarchitecture and design functionality.Design and implement reusable, scalable testbenches and testbench components using System Verilog and UVM.Collaborate with architects, RTL designers, and software engineers to drive feature completeness, performance visibility, and verification closure.What we need to see: M.Tech. (or equivalent) in VLSI or Electronics Engineering OR B.Tech with 2+ years of experience in a similar domainHands-on experience in unit and/or system level verificationAbility to contribute to testbench development and maintenance, preferably using System Verilog and standard methodologiesProficiency in Python or industry-standard scripting languages for automation and test developmentProven debugging fundamentals — ability to read waveforms, analyze logs, and isolate issues effectivelyFamiliarity with industry-standard tools such as VCS, Xcelium, Verdi, or similar simulation/debug environmentsGood understanding of RTL design concepts and experience working with Verilog or SystemVerilogExperience with UVM (Universal Verification Methodology) is a strong plusClear communication skills and collaborative attitude, with ability to work alongside design, DV, and automation teamsWidely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. Also, e have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our outstanding engineering teams are growing fast. If you are creative, curious, and motivated with a real passion for technology, we want to hear from you!#LI-Hybrid

Locations

  • Bengaluru, India

Responsibilities

  • Play a key role in the Hardware Performance Monitor (HWPM) team, helping define and develop system-level RTL and performance measurement methodologies for NVIDIA’s industry-leading SoCs and GPUs.
  • Develop comprehensive test plans, implement tests, and apply robust verification strategies to validate microarchitecture and design functionality.
  • Design and implement reusable, scalable testbenches and testbench components using System Verilog and UVM.
  • Collaborate with architects, RTL designers, and software engineers to drive feature completeness, performance visibility, and verification closure.
  • Play a key role in the Hardware Performance Monitor (HWPM) team, helping define and develop system-level RTL and performance measurement methodologies for NVIDIA’s industry-leading SoCs and GPUs.
  • Develop comprehensive test plans, implement tests, and apply robust verification strategies to validate microarchitecture and design functionality.
  • Design and implement reusable, scalable testbenches and testbench components using System Verilog and UVM.
  • Collaborate with architects, RTL designers, and software engineers to drive feature completeness, performance visibility, and verification closure.

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