MNC InsiderMNC Insider

Digital Physical Design (P&R) Intern

NXP Semiconductors

Digital Physical Design (P&R) Intern

full-timePosted: Aug 2, 2026Updated: Sep 1, 2026Chandler (Office)

Job Description

Job Responsibility: As a Physical Design Intern, you will join a highly experienced team. Your key responsibilities will be:Understand the existing flow, tools and scripts to do Digital backend flow from Synthesis to GDS2 using Cadence tools Support with multiple parallel runs to experiment with different RTL implementations, and/or tools options to find the most area-optimal solution Deeply study the Cadence tools’ user-manuals and user-forum discussions, and suggest improvements to existing flows and scripts that could improve the quality and efficiency of the backend flowJob Qualification: Pursuing Master's degree (MSEE) with majority of courses relevant to Digital Design, RTL, Digital backend flowAny prior experience with this flow is a strong plusWilling to relocate to Phoenix Metro area (Arizona) for the full duration of internship, and minimum 3 days per week full-day presence in NXP's Chandler officeExcellent on problem-solving, teamwork, planning, organizing, attention to detail and communication skills.More information about NXP in the United States...NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.#LI-e41b

Locations

  • Chandler (Office)

Skills Required

  • this flow is a strong plusintermediate

Required Qualifications

  • Pursuing Master's degree (MSEE) with majority of courses relevant to Digital Design, RTL, Digital backend flow (degree)
  • Any prior experience with this flow is a strong plus (experience)
  • Willing to relocate to Phoenix Metro area (Arizona) for the full duration of internship, and minimum 3 days per week full-day presence in NXP's Chandler office (experience)
  • Excellent on problem-solving, teamwork, planning, organizing, attention to detail and communication skills. (experience)
  • More information about NXP in the United States... (experience)

Responsibilities

  • As a Physical Design Intern, you will join a highly experienced team. Your key responsibilities will be:
  • Understand the existing flow, tools and scripts to do Digital backend flow from Synthesis to GDS2 using Cadence tools Support with multiple parallel runs to experiment with different RTL implementations, and/or tools options to find the most area-optimal solution Deeply study the Cadence tools’ user-manuals and user-forum discussions, and suggest improvements to existing flows and scripts that could improve the quality and efficiency of the backend flow

Target Your Resume for "Digital Physical Design (P&R) Intern" , NXP Semiconductors

Get personalized recommendations to optimize your resume specifically for Digital Physical Design (P&R) Intern. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "Digital Physical Design (P&R) Intern" , NXP Semiconductors

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

Tags & Categories

GeneralGeneral

Answer 10 quick questions to check your fit for Digital Physical Design (P&R) Intern @ NXP Semiconductors.

Quiz Challenge
10 Questions
~2 Minutes
Instant Score

Related Books and Jobs

No related jobs found at the moment.