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Senior Analog Design Engineer - MCU

NXP Semiconductors

Senior Analog Design Engineer - MCU

full-timePosted: Aug 2, 2026Updated: Sep 1, 2026Yokneam Ilit

Job Description

NXP Israel provides a unique and revolutionary holistic approach that goes far beyond existing conventions in the market.We provide a complete solution for battery operated SoC design that dynamically reduce the required energy operation for the targeted performance to reach the minimum required energy in a wide range of frequencies, leading to significantly longer battery life.We are looking for a Sr. Analog/Circuit engineer to join the Analog team in our Yokneam site and lead the development and integration of our next generation low power technology.At this position, you will be responsible for:Leading the next generation algorithm development of our ultra-low-power technologyLeading the integration of our technology in new NXP SoC designsvariety of Circuit and Analog chip design tasksvalidation of the new developmentsThe ideal candidate should have:Minimum of 10 Years' experienceKnowledge in circuit designKnowledge of RTL coding (Verilog)Knowledge of Static Timing Analysis (STA) flowGood system view and the HW-SW tasks separationExperience with Cadence Virtuoso design and simulation toolsExcellent communication skills with multinational teamsIndependent and team playerKnowledge in analog design is an advantage.Knowledge of ultra-low power design techniques is an advantageKnowledge of Skill and Python programing languages is an advantageEducation: BsC in Electrical engineering, MsC is an advantage.More information about NXP in Israel...#LI-6710

Locations

  • Yokneam Ilit

Responsibilities

  • Leading the next generation algorithm development of our ultra-low-power technology
  • Leading the integration of our technology in new NXP SoC designs
  • variety of Circuit and Analog chip design tasks
  • validation of the new developments
  • The ideal candidate should have:
  • Minimum of 10 Years' experience
  • Knowledge in circuit design
  • Knowledge of RTL coding (Verilog)
  • Knowledge of Static Timing Analysis (STA) flow
  • Good system view and the HW-SW tasks separation
  • Experience with Cadence Virtuoso design and simulation tools
  • Excellent communication skills with multinational teams
  • Independent and team player
  • Knowledge in analog design is an advantage.
  • Knowledge of ultra-low power design techniques is an advantage
  • Knowledge of Skill and Python programing languages is an advantage
  • Education: BsC in Electrical engineering, MsC is an advantage.
  • More information about NXP in Israel...

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