Job Description

Locations

• Pune

Skills Required

• SoC development from architecture through tape-outintermediate
• automotiveintermediate

Required Qualifications

• Bachelor's degree or higher in Microelectronics, Electrical Engineering, or related disciplines. (degree in higher in microelectronics)
• 15+ years of semiconductor industry experience. (experience, 15 years)
• Proven experience in SoC development from architecture through tape-out. (experience)
• Strong understanding of SoC development flows including: Architecture, RTL Design, Integration, Verification, DFT, Emulation, Physical Design, Silicon Validation. (experience)
• Experience leading large cross-functional engineering teams. (experience)
• Strong project execution, planning, and risk management skills. (experience)
• Excellent communication, leadership, and stakeholder management capabilities. (experience)
• Ability to influence technical direction and drive execution in a matrix organization. (experience)

Preferred Qualifications

• Previous experience as: Chip Lead / SoC Technical Lead / Chief Engineer / Project Technical Leader (experience)
• Experience with automotive, industrial, or safety-critical semiconductor products. (experience)
• Experience working with global development teams across multiple sites. (experience)
• Successful delivery of multiple SoC tape-outs and post-silicon product ramps. (experience)

Responsibilities

• End-to-End Project Ownership: Own SoC program execution from project definition through tape-out and post-silicon support. Ensure on-time, high-quality delivery of key milestones and coordinate engineering support during silicon bring-up, validation, and debug.
• Technical Leadership: Drive technical decision-making across architecture, integration, verification, implementation, validation, and system teams. Serve as the overall technical execution owner for assigned projects.
• Cross-Functional Coordination: Lead and align Architecture, RTL, DFT, Verification, Emulation, Physical Design, AMS, IP, and related engineering teams. Resolve technical dependencies, execution bottlenecks, and critical project risks.
• Program Execution & Risk Management: Develop and maintain project execution plans together with PMO and SoC PM. Monitor schedule, resource demand, critical paths, and risk mitigation plans; drive recovery actions when milestones are at risk.
• Stakeholder Management: Partner with Product Marketing, System Architecture, System Engineering, NPI PM, BU management, and external stakeholders. Communicate project status, technical readiness, key risks, and mitigation plans during management and milestone reviews.
• Tape-Out & Silicon Readiness: Own overall tape-out readiness, including integration quality, signoff closure, cross-functional alignment, and risk management. Coordinate post-silicon validation activities and engineering resources to support silicon bring-up and issue resolution.

Tags & Categories