Position Description Tesla’s AI Hardware Group is looking for a Signal Integrity/Power Integrity Engineer. In this position, you will work with the team to develop next generation AI chips and systems for all Tesla vehicles, Optimus robots, and Data centers. You will be responsible for Optimus and FSD car computer’s signal and power integrity design/validation, including high speed SerDes, parallel link interfaces, and core power rails from on-die, package, PCB, through connectors, cables, etc. In Tesla, we build everything from the First Principle. You are responsible for the end-to-end SIPI design, sign-off, and validation that is essential to a great product. Responsibilities Design SOC package, PCB and system with optimized power integrity and signal integrity Work with cross functional team and vendors on high-speed interconnect design, including advanced packaging, connector, socket, cable, etc. Work with silicon, package and PCB physical design team on high-speed interfaces and power integrity layout optimization Work with power supply design engineers and vendors to bring up power delivery network and characterize the electrical performance Develop and execute test plans to validate system level and component level signal and power integrity, including interconnect channel measurement, SerDes validation/equalization optimization, DDR shmoo validation, noise droop measurement, etc. Requirements Degree in a relevant field, or equivalent experience Relevant product design and validation experience Solid understanding of system and package level SI and PI, electromagnetic theory Prior design and SI/PI modeling experience with high-speed serial interfaces, memory interfaces, and power integrity analysis Familiar with lab equipment, such as oscilloscope, VNA, BERT scope, etc. Experience with lab correlation and validation of simulation results Familiar with power supply circuit design and validation is a plus Strong hands-on skills in data analysis, debugging and lab measurement Scripting in MATLAB or Python is a plus SerDes/DDR IO circuit design and validation is a plus