We are building Terafab, a vertically integrated semiconductor factory at an unprecedented scale. The facility houses logic, memory, packaging, test, and lithography mask production under one roof, optimized for rapid iteration and maximum compute density per square foot. Process engineering is where Terafab technology gets built, atom by atom, and dielectric films set the foundation for device performance. You will develop and own dielectric deposition processes across three distinct chip families: edge-inference processors, space-hardened chips for orbital satellites, and high-bandwidth memory. You'll optimize film stress, conformality, and electrical properties while balancing thermal budgets and integration constraints across radically different product requirements. You should have deep expertise in dielectric deposition, but be ready to work across core process domains such as etch, metrology, and thermal processing as integration evolves. This is a highly hands-on role at one of the most ambitious fab programs in the world.Responsibilities:Develop and qualify ALD, CVD, and PECVD processes for gate dielectrics, high-k materials, inter-layer dielectrics (ILD), and spacer films at 2nm-class nodesCharacterize dielectric film properties—thickness, k-value, leakage, breakdown voltage, conformality, and stressOwn development for high-k gate dielectrics (HfO₂, HfZrO) and low-k ILD films from tool installation through HVM handoffQualify deposition tools from installation through production readiness, including chamber matching, particle control, and process window qualificationAnalyze processes from a first-principles, physics-based approach to understand and manipulate mechanisms, not just recipesLead root cause analysis, establish inline metrology and SPC control strategies, and drive systematic yield improvementSupport 24/7 manufacturing operations through rotations, on-call availability, and rapid response to critical production issuesDrive next-generation dielectric materials and process developmentRequirements:BS or MS in Chemical Engineering, Materials Science, Electrical Engineering, Physics, or related technical field5+ years of hands-on thin films process engineering experience in a semiconductor fab, especially <7nm in a logic, memory, or foundry environmentDeep experience with ALD/CVD tool qualification (Applied Materials, Lam, ASM, or Tokyo Electron), dielectric process development, and process of record (POR) establishment at advanced nodesProficiency with thin films metrology tools: ellipsometry, XRF, TEM, CV/IV characterization, film stress measurement, and defect inspectionStrong DOE skills and statistical analysis capability (JMP, Python, or R)Ability to work closely and proactively across lithography, etch, thin films, integration, and equipment engineering teams