Staff Electrical Design Engineer – AI Compute Motherboard, Korea
Tesla
Staff Electrical Design Engineer – AI Compute Motherboard, Korea
Job Description
About the roleTesla's AI Compute electrical design team builds the system boards that power autonomous driving, humanoid robotics, and the data centers that train and serve our models. You will own complex high-speed motherboards built around Tesla's custom neural-engine silicon and leading x86/Arm processors, balancing inferencing performance, efficiency, cost, and reliability — from a single vehicle ECU up to scale-up and scale-out clusters in the AI inference data center.ResponsibilitiesDegree in Electrical / Computer Engineering, or equivalent industry experienceDemonstrated end-to-end PCBA design ownership with hands-on bring-up, FA, and system test5+ years driving and maintaining schematics in Cadence Allegro System Capture or equivalentComplex motherboard experience with high-performance x86/Arm processors and/or custom siliconHigh-speed design experience with PCIe, MIPI, Ethernet, DisplayPort, or USBSolid analog and power fundamentals (MOSFETs, op-amps, switching regulators, gate drivers)High-power, high-efficiency voltage regulator design and analysisExperience shipping high-volume products from concept to mass productionProficient with bench tools — oscilloscopes, BERT, network analyzers, signal generatorsComfortable iterating with mechanical, thermal, and EMC partners under tight, evolving constraintsTrack record of driving suppliers to meet reliability, performance, and scalability targets across the design-to-production lifecycleRequired qualificationsDegree in Electrical / Computer Engineering, or equivalent industry experienceDemonstrated end-to-end PCB assembly design ownership, including hands-on bring-up, electrical validation, failure analysis, and system testStrong high-speed board design (>10 Gbps) with PCIe, MIPI, Ethernet, DisplayPort, USB, or HDMIComplex motherboard experience with high-performance x86/Arm processors and/or custom siliconWorking knowledge of AI SoC specifications — compute, memory bandwidth, network ingress/egress, peak power, storage — and benchtop bring-upHardware and software co-design experience optimizing inference for large language modelsHigh-power, high-efficiency voltage regulator designSolid analog and power fundamentals (MOSFETs, op-amps, switching regulators, gate drivers)Experience shipping high-volume products from concept to mass productionComfortable iterating with mechanical, thermal, and EMC partners under tight, evolving constraintsTrack record of driving suppliers to meet reliability, performance, and scalability targets across the design-to-production lifecycleProficient with bench tools — oscilloscopes, BERT, network analyzers, signal generatorsPreferredPCB layout experience in Cadence Allegro or AltiumWorking knowledge of AI SoC specifications — compute, memory bandwidth, network ingress/egress, peak power, storage — and benchtop bring-upInter-chip communication for scale-up AI clusters: 112G / 224G SerDes, 100G/200G EthernetCutting-edge memory: GDDR6/7, HBM, DDR5, LPDDR5/6
Locations
- Gangnam-gu, Seoul, South Korea
Skills Required
- high-performance x86/Arm processors and/or custom siliconintermediate
- AI SoC specifications — computeintermediate
- bench tools — oscilloscopesintermediate
- Cadence Allegrointermediate
Required Qualifications
- Degree in Electrical / Computer Engineering, or equivalent industry experience (experience)
- Demonstrated end-to-end PCB assembly design ownership, including hands-on bring-up, electrical validation, failure analysis, and system test (experience)
- Strong high-speed board design (>10 Gbps) with PCIe, MIPI, Ethernet, DisplayPort, USB, or HDMI (experience)
- Complex motherboard experience with high-performance x86/Arm processors and/or custom silicon (experience)
- Working knowledge of AI SoC specifications — compute, memory bandwidth, network ingress/egress, peak power, storage — and benchtop bring-up (experience)
- Hardware and software co-design experience optimizing inference for large language models (experience)
- High-power, high-efficiency voltage regulator design (experience)
- Solid analog and power fundamentals (MOSFETs, op-amps, switching regulators, gate drivers) (experience)
- Experience shipping high-volume products from concept to mass production (experience)
- Comfortable iterating with mechanical, thermal, and EMC partners under tight, evolving constraints (experience)
- Track record of driving suppliers to meet reliability, performance, and scalability targets across the design-to-production lifecycle (experience)
- Proficient with bench tools — oscilloscopes, BERT, network analyzers, signal generators (experience)
Preferred Qualifications
- PCB layout experience in Cadence Allegro or Altium (experience)
- Working knowledge of AI SoC specifications — compute, memory bandwidth, network ingress/egress, peak power, storage — and benchtop bring-up (experience)
- Inter-chip communication for scale-up AI clusters: 112G / 224G SerDes, 100G/200G Ethernet (experience)
- Cutting-edge memory: GDDR6/7, HBM, DDR5, LPDDR5/6 (experience)
Responsibilities
- Degree in Electrical / Computer Engineering, or equivalent industry experience
- Demonstrated end-to-end PCBA design ownership with hands-on bring-up, FA, and system test
- 5+ years driving and maintaining schematics in Cadence Allegro System Capture or equivalent
- Complex motherboard experience with high-performance x86/Arm processors and/or custom silicon
- High-speed design experience with PCIe, MIPI, Ethernet, DisplayPort, or USB
- Solid analog and power fundamentals (MOSFETs, op-amps, switching regulators, gate drivers)
- High-power, high-efficiency voltage regulator design and analysis
- Experience shipping high-volume products from concept to mass production
- Proficient with bench tools — oscilloscopes, BERT, network analyzers, signal generators
- Comfortable iterating with mechanical, thermal, and EMC partners under tight, evolving constraints
- Track record of driving suppliers to meet reliability, performance, and scalability targets across the design-to-production lifecycle
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